Sfoglia per Autore
A threshold voltage gradient compensation circuit for weak inversion operators for analog OCR chips
1997-01-01 Bo, G. M.; Caviglia, Daniele; Valle, Maurizio
Hierarchical Neural Networks for Quality Control in Steel-Industry Plants
1997-01-01 D., Baratta; Valle, Maurizio; Caviglia, Daniele
Analysis of the Behavior of a Dynamic Latch Comparator
1998-01-01 P., Cusinato; M., Bruccoleri; Caviglia, Daniele; Valle, Maurizio
A Web-Based Courseware On Microelectronics
1998-01-01 Caviglia, Daniele; G., Da Bormida; Ponta, Domenico; M., Terrizzano; Valle, Maurizio
Design of an Analog CMOS Self-Learning Multilayer Perceptron Chip
1998-01-01 G. M., Bo; Caviglia, Daniele; H., Chiblé; Valle, Maurizio
Recognizing Handwritten Digits with a Dedicated Analog VLSI Feature Extractor
1998-01-01 G. M., Bo; Caviglia, Daniele; Valle, Maurizio
A reconfigurable analog VLSI neural network architecture with non linear synapses
1998-01-01 Bo, G. M.; Caviglia, Daniele; Valle, Maurizio; Stratta, R.; Trucco, E.
An Analog VLSI Implementation of a feature Extractor for Real Time Optical Character Recognition
1998-01-01 Bo, G. M.; Caviglia, Daniele; Valle, Maurizio
Design of an analog CMOS self-learning MLP chip
1998-01-01 Bo, G. M.; Caviglia, Daniele; Chible, H.; Valle, Maurizio
Analog VLSI real time optical character recognition system based on a neural architecture
1999-01-01 Bo, Gian Marco; Caviglia, Daniele; Valle, Maurizio
Analog VLSI On-Chip Learning Neural Network with Learning Rate Adaptation
1999-01-01 G. M., Bo; H., Chiblé; Caviglia, Daniele; Valle, Maurizio
A Circuit Architecture for Analog On-Chip Back Propagation Learning with Local Learning Rate Adaptation
1999-01-01 Bo, G. M.; Caviglia, Daniele; Chiblé, H.; Valle, Maurizio
Gradient descent learning algorithm for hierarchical neural networks: A case study in industrial quality
1999-01-01 Daniela, Baratta; Francesco, Diotalevi; Valle, Maurizio; Caviglia, Daniele
An Experimental Analog CMOS Self-Learning Chip
1999-01-01 G. M., Bo; H., Chiblé; Caviglia, Daniele; Valle, Maurizio
An on-chip learning neural network
2000-01-01 Gianmarco, Bo; Caviglia, Daniele; Valle, Maurizio
AN ANALOG ON-CHIP LEARNING CIRCUIT ARCHITECTURE OF THE WEIGHTPERTURBATION ALGORITHM
2000-01-01 F., Diotalevi; Valle, Maurizio; G. M., Bo; E., Biglieri; Caviglia, Daniele
A VLSI architecture for weight perturbation on chip learning implementation
2000-01-01 Francesco, Diotalevi; Valle, Maurizio; Gianmarco, Bo; Caviglia, Daniele
Evaluation of gradient descent learning algorithms with an adaptive local rate technique for hierarchical feed forward architectures
2000-01-01 Diotalevi, Francesco; Valle, Maurizio; Caviglia, Daniele
A current-mode two-quadrant multiplier for analog array-based neural systems
2000-01-01 G. M., Bo; Caviglia, Daniele; Valle, Maurizio
Analog CMOS current mode neural primitives
2000-01-01 F., Diotalevi; Valle, Maurizio; G. M., Bo; E., Biglieri; Caviglia, Daniele
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