CAVIGLIA, DANIELE
CAVIGLIA, DANIELE
100026 - Dipartimento di Ingegneria navale, elettrica, elettronica e delle telecomunicazioni
A Novel Method to Size Resistance for Biasing the POSFET Sensors in Common Drain ConfigurationSensors and Microsystems
2014-01-01 Sinha, ARUN KUMAR; Caviglia, Daniele
A Parallel Approach to Symbolic Layout Compaction of Digital CMOS Cells
1992-01-01 Barzaghi, M.; Caviglia, Daniele; Chirico, M.; Curatelli, Francesco; Bisio, G. M.; Prossen, S.; Stefani, L.
A Rain Estimation System Based on Electromagnetic Propagation Models and DVB-S Opportunistic Sensors
2017-01-01 Caviglia, Daniele; Pastorino, Matteo; Randazzo, Andrea; Caridi, Andrea
Analog VLSI Hardware implementation of a supervised learning algorithm
2001-01-01 Bo, G. M.; Caviglia, Daniele; Chiblé, H.; Valle, Maurizio
Analog VLSI On-Chip Learning Neural Network with Learning Rate Adaptation
1999-01-01 G. M., Bo; H., Chiblé; Caviglia, Daniele; Valle, Maurizio
Gradient descent learning algorithm for hierarchical neural networks: A case study in industrial quality
1999-01-01 Daniela, Baratta; Francesco, Diotalevi; Valle, Maurizio; Caviglia, Daniele
Metal Oxide Gas Sensor Electronic Interfaces
2020-01-01 Hijazi, Zeinab; Caviglia, Daniele D.; Valle, Maurizio
Transputer Application for Integrated Circuit Layout Verification
1991-01-01 Chirico, M.; Caviglia, Daniele; Barzaghi, M.; Curatelli, Francesco
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A Novel Method to Size Resistance for Biasing the POSFET Sensors in Common Drain ConfigurationSensors and Microsystems | 1-gen-2014 | Sinha, ARUN KUMAR; Caviglia, Daniele | |
| A Parallel Approach to Symbolic Layout Compaction of Digital CMOS Cells | 1-gen-1992 | Barzaghi, M.; Caviglia, Daniele; Chirico, M.; Curatelli, Francesco; Bisio, G. M.; Prossen, S.; Stefani, L. | |
| A Rain Estimation System Based on Electromagnetic Propagation Models and DVB-S Opportunistic Sensors | 1-gen-2017 | Caviglia, Daniele; Pastorino, Matteo; Randazzo, Andrea; Caridi, Andrea | |
| Analog VLSI Hardware implementation of a supervised learning algorithm | 1-gen-2001 | Bo, G. M.; Caviglia, Daniele; Chiblé, H.; Valle, Maurizio | |
| Analog VLSI On-Chip Learning Neural Network with Learning Rate Adaptation | 1-gen-1999 | G. M., Bo; H., Chiblé; Caviglia, Daniele; Valle, Maurizio | |
| Gradient descent learning algorithm for hierarchical neural networks: A case study in industrial quality | 1-gen-1999 | Daniela, Baratta; Francesco, Diotalevi; Valle, Maurizio; Caviglia, Daniele | |
| Metal Oxide Gas Sensor Electronic Interfaces | 1-gen-2020 | Hijazi, Zeinab; Caviglia, Daniele D.; Valle, Maurizio | |
| Transputer Application for Integrated Circuit Layout Verification | 1-gen-1991 | Chirico, M.; Caviglia, Daniele; Barzaghi, M.; Curatelli, Francesco |