CAVIGLIA, DANIELE
CAVIGLIA, DANIELE
100026 - Dipartimento di Ingegneria navale, elettrica, elettronica e delle telecomunicazioni
153dB dynamic range calibration-less gas sensor interface circuit with quasi-digital output
2017-01-01 Hijazi, Zeinab; Grassi, Marco; Caviglia, Daniele D.; Valle, Maurizio
A Current Mode CMOS Multi Layer Perceptron Chip
1996-01-01 G. M., Bo; Caviglia, Daniele; Valle, Maurizio
A Digital Controlled Oscillator Based on Controlled Phase Shifting
1989-01-01 Donzellini, Giuliano; Caviglia, Daniele; Parodi, Giancarlo; Ponta, Domenico; P., Repetto
A Digitally Controlled Oscillator Based On Controlled Phase Shifting
1989-01-01 Caviglia, Daniele; Donzellini, Giuliano; Parodi, Giancarlo; Ponta, Domenico; P., Repetto
A Distributed DRC program for IC Layout Verification
1990-01-01 Paganini, M; Chirico, M; Caviglia, Daniele; Curatelli, Francesco; Barzaghi, M; Bisio, G. M.
A Graph-Based Tool for Compacted Channel Routing
1992-01-01 Curatelli, Francesco; Caviglia, Daniele; Cornero, M; Bisio, G. M.
A linear model of the recurrent inhibition in visual cortex leading to Gabor-like receptive fields.
1992-01-01 BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO
A multi-layers analog VLSI architecture for texture analysis isomorphic to cortical cells in mammalian visual system.
1994-01-01 Raffo, L; BISIO G., M; Caviglia, Daniele; Indiveri, G; Sabatini, SILVIO PAOLO
A neural architectural model of simple and complex cortical cells.
1992-01-01 Raffo, L; BISIO G., M; Caviglia, Daniele; Indiveri, G; Sabatini, SILVIO PAOLO
A neural model of cortical cells characterized by Gabor-like receptive fields-Application to texture segmentation.
1992-01-01 BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO
A neural network architectural model of visual cortical cells for texture segregation.
1993-01-01 BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO
A Parallel Approach to Symbolic Layout Compaction of Digital CMOS Cells
1992-01-01 Barzaghi, M.; Caviglia, Daniele; Chirico, M.; Curatelli, Francesco; Bisio, G. M.; Prossen, S.; Stefani, L.
A reconfigurable analog VLSI neural network architecture with non linear synapses
1998-01-01 Bo, G. M.; Caviglia, Daniele; Valle, Maurizio; Stratta, R.; Trucco, E.
A Self-Learning Analog Neural Processor
2002-01-01 Bo, G. M.; Caviglia, Daniele; Valle, Maurizio
A Symbolic Cell Synthesizer for CMOS IC Design
1988-01-01 Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M.
A VLSI architecture for weight perturbation on chip learning implementation
2000-01-01 Francesco, Diotalevi; Valle, Maurizio; Gianmarco, Bo; Caviglia, Daniele
A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant
1996-01-01 Valle, Maurizio; L., Raffo; Caviglia, Daniele; Bisio, Giacomo
A Web-Based Courseware On Microelectronics
1998-01-01 Caviglia, Daniele; G., Da Bormida; Ponta, Domenico; M., Terrizzano; Valle, Maurizio
About folded-PLA area and folding evaluation
1987-01-01 Caviglia, Daniele; V., Piuri; M., Santomauro
AC/DC Buck Boost Converter for Wind-Powered Wireless Sensors
2019-01-01 Haidar, Mohammad; Chible, H.; Morasso, R.; Caviglia, D. D.
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
153dB dynamic range calibration-less gas sensor interface circuit with quasi-digital output | 1-gen-2017 | Hijazi, Zeinab; Grassi, Marco; Caviglia, Daniele D.; Valle, Maurizio | |
A Current Mode CMOS Multi Layer Perceptron Chip | 1-gen-1996 | G. M., Bo; Caviglia, Daniele; Valle, Maurizio | |
A Digital Controlled Oscillator Based on Controlled Phase Shifting | 1-gen-1989 | Donzellini, Giuliano; Caviglia, Daniele; Parodi, Giancarlo; Ponta, Domenico; P., Repetto | |
A Digitally Controlled Oscillator Based On Controlled Phase Shifting | 1-gen-1989 | Caviglia, Daniele; Donzellini, Giuliano; Parodi, Giancarlo; Ponta, Domenico; P., Repetto | |
A Distributed DRC program for IC Layout Verification | 1-gen-1990 | Paganini, M; Chirico, M; Caviglia, Daniele; Curatelli, Francesco; Barzaghi, M; Bisio, G. M. | |
A Graph-Based Tool for Compacted Channel Routing | 1-gen-1992 | Curatelli, Francesco; Caviglia, Daniele; Cornero, M; Bisio, G. M. | |
A linear model of the recurrent inhibition in visual cortex leading to Gabor-like receptive fields. | 1-gen-1992 | BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO | |
A multi-layers analog VLSI architecture for texture analysis isomorphic to cortical cells in mammalian visual system. | 1-gen-1994 | Raffo, L; BISIO G., M; Caviglia, Daniele; Indiveri, G; Sabatini, SILVIO PAOLO | |
A neural architectural model of simple and complex cortical cells. | 1-gen-1992 | Raffo, L; BISIO G., M; Caviglia, Daniele; Indiveri, G; Sabatini, SILVIO PAOLO | |
A neural model of cortical cells characterized by Gabor-like receptive fields-Application to texture segmentation. | 1-gen-1992 | BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO | |
A neural network architectural model of visual cortical cells for texture segregation. | 1-gen-1993 | BISIO G., M; Caviglia, Daniele; Indiveri, G; Raffo, L; Sabatini, SILVIO PAOLO | |
A Parallel Approach to Symbolic Layout Compaction of Digital CMOS Cells | 1-gen-1992 | Barzaghi, M.; Caviglia, Daniele; Chirico, M.; Curatelli, Francesco; Bisio, G. M.; Prossen, S.; Stefani, L. | |
A reconfigurable analog VLSI neural network architecture with non linear synapses | 1-gen-1998 | Bo, G. M.; Caviglia, Daniele; Valle, Maurizio; Stratta, R.; Trucco, E. | |
A Self-Learning Analog Neural Processor | 1-gen-2002 | Bo, G. M.; Caviglia, Daniele; Valle, Maurizio | |
A Symbolic Cell Synthesizer for CMOS IC Design | 1-gen-1988 | Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M. | |
A VLSI architecture for weight perturbation on chip learning implementation | 1-gen-2000 | Francesco, Diotalevi; Valle, Maurizio; Gianmarco, Bo; Caviglia, Daniele | |
A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant | 1-gen-1996 | Valle, Maurizio; L., Raffo; Caviglia, Daniele; Bisio, Giacomo | |
A Web-Based Courseware On Microelectronics | 1-gen-1998 | Caviglia, Daniele; G., Da Bormida; Ponta, Domenico; M., Terrizzano; Valle, Maurizio | |
About folded-PLA area and folding evaluation | 1-gen-1987 | Caviglia, Daniele; V., Piuri; M., Santomauro | |
AC/DC Buck Boost Converter for Wind-Powered Wireless Sensors | 1-gen-2019 | Haidar, Mohammad; Chible, H.; Morasso, R.; Caviglia, D. D. |