Efficient low power design is one of the most important metrics facing the embedded electronic systems. Many low power design techniques and technologies are developed and used in various domains aiming to meet the application demands. In this paper we present an efficient approach combining two different techniques at architecture and circuit levels to reduce the power consumption of CORDIC circuits. At architecture level we propose a scalable precision architecture which turns-off a part of the circuit during real time functionality to reduce the circuit dynamic power. Then, we exploit the use of inexact adders at the place of the normal ones in the reconfigurable CORDIC circuit. The proposed approach provides a good improvement over the other similar systems: it decreases up to 6× the slice-delay product when performance is compared; moreover, the proposed reconfigurable approximate CORDIC reduces 40% the consumption of power when operating in normal mode, and achieves a reduction up to 73% over the other systems when operating in Save-mode 1. Copyright © 2017 American Scientific Publishers. All rights reserved.
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|Titolo:||Approximate computing techniques for low power implementation of reconfigurable coordinate rotation digital computer circuits|
|Data di pubblicazione:||2017|
|Appare nelle tipologie:||01.01 - Articolo su rivista|