A circuit implementation of a pattern classifier based on the Hamming net is proposed. The circuit classifies pattern configurations representing the digits 0, . . ., 9; it is based on a standard CMOS technology and it allows a simple and reliable implementation. The circuit has been simulated by using SPICE; it exhibits notable robustness, since its functionality is not affected by parameter variations in a wide range.
CMOS Circuit Design of a Programmable Neural Net Classifier of Exclusive Classes
CAVIGLIA, DANIELE;BISIO, GIACOMO;VALLE, MAURIZIO
1989-01-01
Abstract
A circuit implementation of a pattern classifier based on the Hamming net is proposed. The circuit classifies pattern configurations representing the digits 0, . . ., 9; it is based on a standard CMOS technology and it allows a simple and reliable implementation. The circuit has been simulated by using SPICE; it exhibits notable robustness, since its functionality is not affected by parameter variations in a wide range.
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