A new data-flow graph representation is presented, which can be used in system level synthesis for the specification and management of a generic basic block node behavior. It is possible to flexibly specify and manage any composite data structure through the definition of a powerful representation scheme for arrays and records.
A Data-Flow Graph Representation for HDL Specification
CURATELLI, FRANCESCO;CHIRICO M.
1998-01-01
Abstract
A new data-flow graph representation is presented, which can be used in system level synthesis for the specification and management of a generic basic block node behavior. It is possible to flexibly specify and manage any composite data structure through the definition of a powerful representation scheme for arrays and records.
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