The computational properties (global and local convergence, computational complexity and algorithm tuning) of neural algorithms are analyzed from a circuit perspective. Different equivalent algorithms are derived by applying various numerical techniques (multistep and relaxation methods) to the stationary and dynamic analysis of a common neural circuit model. Simulation experiments are presented for an 8-bit analog-to-digital-converter implementation of a Hopfield neural network. The implications for the simulation of these neural algorithms on parallel architectures are pointed out.
Analysis of neural algorithms for parallel architectures
Di Zitti Ermanno;Bisio Giacomo M.;Caviglia Daniele D.;Chirico Marco;Parodi Giancarlo
1989-01-01
Abstract
The computational properties (global and local convergence, computational complexity and algorithm tuning) of neural algorithms are analyzed from a circuit perspective. Different equivalent algorithms are derived by applying various numerical techniques (multistep and relaxation methods) to the stationary and dynamic analysis of a common neural circuit model. Simulation experiments are presented for an 8-bit analog-to-digital-converter implementation of a Hopfield neural network. The implications for the simulation of these neural algorithms on parallel architectures are pointed out.
File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
