In this paper we show how to map a LSSVM on digital hardware. In particular, we provide a theoretical analysis of quantization effects, due to finite register lengths, that leads to some useful bounds for computing the necessary number of bits for a correct hardware implementation. Then, we describe a new FPGA-based architecture, the KTRON, which implements the feed-forward phase of a LSSVM.

Mapping LSSVM on Digital Hardware

ANGUITA, DAVIDE;
2004-01-01

Abstract

In this paper we show how to map a LSSVM on digital hardware. In particular, we provide a theoretical analysis of quantization effects, due to finite register lengths, that leads to some useful bounds for computing the necessary number of bits for a correct hardware implementation. Then, we describe a new FPGA-based architecture, the KTRON, which implements the feed-forward phase of a LSSVM.
2004
9780780383593
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11567/315666
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