HIDEL (HIerarchical DEscription Language) is a new language for structural description of hardware systems. The use of HIDEL allows a modular and hierarchical description of a hardware system. HIDEL can be integrated with a data model, called the Hierarchical Hypergraph with Ports (HHP), which provides a graph-based description of a VLSI object at different levels of specification. The possibility of extending the HIDEL-HHP environment with functional description for simulation is also investigated.

HIDEL. A language for hierarchical VLSI design

Ancona M.;Clematis A.;De Floriani L.;Puppo E.
1991-01-01

Abstract

HIDEL (HIerarchical DEscription Language) is a new language for structural description of hardware systems. The use of HIDEL allows a modular and hierarchical description of a hardware system. HIDEL can be integrated with a data model, called the Hierarchical Hypergraph with Ports (HHP), which provides a graph-based description of a VLSI object at different levels of specification. The possibility of extending the HIDEL-HHP environment with functional description for simulation is also investigated.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11567/1106430
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