CURATELLI, FRANCESCO
CURATELLI, FRANCESCO
100026 - Dipartimento di Ingegneria navale, elettrica, elettronica e delle telecomunicazioni
A CGI Tool for Multiple Access to VHDL CAD Tools
1998-01-01 Curatelli, Francesco; Mangeruca, L; Motta, L; Ghezzi, F; Guido, D.
A Distributed DRC program for IC Layout Verification
1990-01-01 Paganini, M; Chirico, M; Caviglia, Daniele; Curatelli, Francesco; Barzaghi, M; Bisio, G. M.
A Graph-Based Tool for Compacted Channel Routing
1992-01-01 Curatelli, Francesco; Caviglia, Daniele; Cornero, M; Bisio, G. M.
A Java Simulation Environment for System Level Synthesis
1999-01-01 Curatelli, Francesco; Mangeruca, L; Motta, L.
A Message-Passing Communication Scheme for System Specification
1999-01-01 Curatelli, Francesco; Mangeruca, L; Chirico, M.
A Method for Programming Matrix Algorithms in Array Processors
1988-01-01 Bisio, G. M.; Arduini, F; Curatelli, Francesco; DI ZITTI, E; Parodi, G. C.; Zini, A.
A Powerful Data-Flow Graph Representation for Basic Blocks
1998-01-01 Curatelli, Francesco; Mangeruca, L; Chirico, M.
A smart mobility serious game concept and business development study
2016-01-01 Bellotti, Francesco; Berta, Riccardo; DE GLORIA, Alessandro; Dange, GAUTAM RAVINDRA; Paranthaman, P. K.; Curatelli, Francesco; Martinengo, Chiara; Barabino, Giulio; Sciutto, Giuseppe; Demirtzis, E.; Hausler, F.
A Symbolic Cell Synthesizer for CMOS IC Design
1988-01-01 Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M.
A Symbolic Switchbox Router for Macrocell IC's Design
1989-01-01 Curatelli, Francesco; Bisio, G. M.
An Algorithm for the Definition of Routing Regions in VLSI Design
1990-01-01 Curatelli, Francesco; Bisio, G. M.; Caviglia, Daniele; Barzaghi, M.
An Holographic Neural Network-Based Method for Recognition of Handwritten Numerals
1998-01-01 MAYORA IBARRA, O; Curatelli, Francesco; Bo, G. M.; Caviglia, Daniele
An Object-Oriented Framework for the Design of VLSI Cells
1990-01-01 Barzaghi, M; Bisio, G. M.; Marchesi, M; Caviglia, Daniele; Curatelli, Francesco
Automatic Generation of Symbolic Cells from a Net-List Description
1989-01-01 Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M.
CAD Support for System-level Synthesis
1993-01-01 Cornero, M; Chirico, M; Curatelli, Francesco; M. BISIO, G.
DERECK: un Efficiente Verificatore di Layout
1986-01-01 Caviglia, Daniele; Curatelli, Francesco; Zunino, D; Raimondo, M; Bisio, G. M.
Design Criteria for Educational Tools to Overcome Mathematics Learning Difficulties
2012-01-01 Curatelli, Francesco; Martinengo, Chiara
Designing a Serious Game as a Diagnostic Tool
2015-01-01 Gongsook, Pongpanote; Peijnenborgh, Janneke; van der Spek, Erik; Hu, Jun; Bellotti, Francesco; Berta, Riccardo; de Gloria, Alessandro; Curatelli, Francesco; Martinengo, Chiara; Rauterberg, Matthias; Hendriksen, Jos
Development of CAD Applications Using Different Languages: a Comparative Analysis
1988-01-01 Marchesi, M; Bisio, G. M.; Curatelli, Francesco; DI ZITTI, E.
Efficient Management of Complex Elements in Physical IC Design
1990-01-01 Curatelli, Francesco; Barzaghi, M; Bisio, G. M.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A CGI Tool for Multiple Access to VHDL CAD Tools | 1-gen-1998 | Curatelli, Francesco; Mangeruca, L; Motta, L; Ghezzi, F; Guido, D. | |
| A Distributed DRC program for IC Layout Verification | 1-gen-1990 | Paganini, M; Chirico, M; Caviglia, Daniele; Curatelli, Francesco; Barzaghi, M; Bisio, G. M. | |
| A Graph-Based Tool for Compacted Channel Routing | 1-gen-1992 | Curatelli, Francesco; Caviglia, Daniele; Cornero, M; Bisio, G. M. | |
| A Java Simulation Environment for System Level Synthesis | 1-gen-1999 | Curatelli, Francesco; Mangeruca, L; Motta, L. | |
| A Message-Passing Communication Scheme for System Specification | 1-gen-1999 | Curatelli, Francesco; Mangeruca, L; Chirico, M. | |
| A Method for Programming Matrix Algorithms in Array Processors | 1-gen-1988 | Bisio, G. M.; Arduini, F; Curatelli, Francesco; DI ZITTI, E; Parodi, G. C.; Zini, A. | |
| A Powerful Data-Flow Graph Representation for Basic Blocks | 1-gen-1998 | Curatelli, Francesco; Mangeruca, L; Chirico, M. | |
| A smart mobility serious game concept and business development study | 1-gen-2016 | Bellotti, Francesco; Berta, Riccardo; DE GLORIA, Alessandro; Dange, GAUTAM RAVINDRA; Paranthaman, P. K.; Curatelli, Francesco; Martinengo, Chiara; Barabino, Giulio; Sciutto, Giuseppe; Demirtzis, E.; Hausler, F. | |
| A Symbolic Cell Synthesizer for CMOS IC Design | 1-gen-1988 | Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M. | |
| A Symbolic Switchbox Router for Macrocell IC's Design | 1-gen-1989 | Curatelli, Francesco; Bisio, G. M. | |
| An Algorithm for the Definition of Routing Regions in VLSI Design | 1-gen-1990 | Curatelli, Francesco; Bisio, G. M.; Caviglia, Daniele; Barzaghi, M. | |
| An Holographic Neural Network-Based Method for Recognition of Handwritten Numerals | 1-gen-1998 | MAYORA IBARRA, O; Curatelli, Francesco; Bo, G. M.; Caviglia, Daniele | |
| An Object-Oriented Framework for the Design of VLSI Cells | 1-gen-1990 | Barzaghi, M; Bisio, G. M.; Marchesi, M; Caviglia, Daniele; Curatelli, Francesco | |
| Automatic Generation of Symbolic Cells from a Net-List Description | 1-gen-1989 | Costa, R; Curatelli, Francesco; Caviglia, Daniele; Bisio, G. M. | |
| CAD Support for System-level Synthesis | 1-gen-1993 | Cornero, M; Chirico, M; Curatelli, Francesco; M. BISIO, G. | |
| DERECK: un Efficiente Verificatore di Layout | 1-gen-1986 | Caviglia, Daniele; Curatelli, Francesco; Zunino, D; Raimondo, M; Bisio, G. M. | |
| Design Criteria for Educational Tools to Overcome Mathematics Learning Difficulties | 1-gen-2012 | Curatelli, Francesco; Martinengo, Chiara | |
| Designing a Serious Game as a Diagnostic Tool | 1-gen-2015 | Gongsook, Pongpanote; Peijnenborgh, Janneke; van der Spek, Erik; Hu, Jun; Bellotti, Francesco; Berta, Riccardo; de Gloria, Alessandro; Curatelli, Francesco; Martinengo, Chiara; Rauterberg, Matthias; Hendriksen, Jos | |
| Development of CAD Applications Using Different Languages: a Comparative Analysis | 1-gen-1988 | Marchesi, M; Bisio, G. M.; Curatelli, Francesco; DI ZITTI, E. | |
| Efficient Management of Complex Elements in Physical IC Design | 1-gen-1990 | Curatelli, Francesco; Barzaghi, M; Bisio, G. M. |