In most robotic and biomedical applications, the interest for real-time embedded systems with tactile ability has been growing. For example in prosthetics, a dedicated portable system is needed for developing wearable devices. The main challenges for such systems are low latency, low power consumption and reduced hardware complexity. In order to improve hardware efficiency and reduce power consumption, approximate computing techniques have been assessed. This strategy is suitable for error-tolerant applications involving a large amount of data to be processed, which perfectly fits tactile data processing. This paper presents the first case study of applying Inexact Speculative Adders (ISA) to the FPGA implementation of a Coordinate Rotation Digital Computer (CORDIC) module within the Machine Learning algorithm of a tactile data processing system. The design has been synthesized and implemented on a Xilinx ZYNQ-7000 ZC702 device. Preliminary results have shown dynamic power reduction up to 40% and delay latency reduction up to 21% compared to a conventional CORDIC module, at the cost of a negligible average relative error of 0.049% for sine and 0.003% for cosine computations. © 2017 IEEE.

Approximate FPGA implementation of CORDIC for tactile data processing using speculative adders

Franceschi M.;Ibrahim A.;Valle M.
2017-01-01

Abstract

In most robotic and biomedical applications, the interest for real-time embedded systems with tactile ability has been growing. For example in prosthetics, a dedicated portable system is needed for developing wearable devices. The main challenges for such systems are low latency, low power consumption and reduced hardware complexity. In order to improve hardware efficiency and reduce power consumption, approximate computing techniques have been assessed. This strategy is suitable for error-tolerant applications involving a large amount of data to be processed, which perfectly fits tactile data processing. This paper presents the first case study of applying Inexact Speculative Adders (ISA) to the FPGA implementation of a Coordinate Rotation Digital Computer (CORDIC) module within the Machine Learning algorithm of a tactile data processing system. The design has been synthesized and implemented on a Xilinx ZYNQ-7000 ZC702 device. Preliminary results have shown dynamic power reduction up to 40% and delay latency reduction up to 21% compared to a conventional CORDIC module, at the cost of a negligible average relative error of 0.049% for sine and 0.003% for cosine computations. © 2017 IEEE.
2017
9781509064472
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11567/932355
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