Efficient implementation of SVM training on embedded electronic systems

The implementation of training algorithms for SVMs on embedded architectures differs significantly from the electronic support of trained SVM systems. This mostly depends on the complexity and the computational intricacies brought about by the optimization process, which implies a Quadratic-Programming prob-lem and usually involves large data sets. This work presents a general approach to the efficient implementation of SVM training on Digital Signal Processor (DSP) devices. The methodology optimizes efficiency by suitably adjusting the established, effective Keerthi’s optimization algorithm for large data sets. Besides, the algorithm is reformulated to best exploit the computational features of DSP devices and boost efficiency accordingly. Experimental results tackle the training problem of SVMs by involving real-world benchmarks, and confirm both the computational efficiency of the approach.