Binarization is a machine learning optimization for limited resource devices that has achieved significant results in edge applications. As microcontrollers are the mainstream platform for field applications in industry, this article investigates memory efficient deployment of binary neural networks (BNNs) to such devices. To this end, we developed a library of binarized NN layers in platform-independent C language. The implementation optimizes the memory footprint by adapting the number of filters and neurons for each layer to the C language specifications (8 bit addressable spacing and 32 bit floating points). We tested the library by implementing a BNN for robotic touch classification on a Cortex-M7 microcontroller. Experimental results show the validity of the proposed hardware and software architecture, with improvements over the state of the art in robotic touch classification in terms of accuracy (+2%), memory footprint (+15%), and latency (+25%).

Memory Efficient Binary Convolutional Neural Networks on Microcontrollers

Sakr F.;Berta R.;Younes H.;De Gloria A.;Bellotti F.
2022-01-01

Abstract

Binarization is a machine learning optimization for limited resource devices that has achieved significant results in edge applications. As microcontrollers are the mainstream platform for field applications in industry, this article investigates memory efficient deployment of binary neural networks (BNNs) to such devices. To this end, we developed a library of binarized NN layers in platform-independent C language. The implementation optimizes the memory footprint by adapting the number of filters and neurons for each layer to the C language specifications (8 bit addressable spacing and 32 bit floating points). We tested the library by implementing a BNN for robotic touch classification on a Cortex-M7 microcontroller. Experimental results show the validity of the proposed hardware and software architecture, with improvements over the state of the art in robotic touch classification in terms of accuracy (+2%), memory footprint (+15%), and latency (+25%).
2022
978-1-6654-8140-3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11567/1106233
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